Conventional non-volatile memory systems often utilize wear leveling techniques to move data from memory blocks that are infrequently updated to memory blocks that are frequently updated. These wear leveling techniques are often based on averages of program/erase cycle counts (P/E count) of the memory blocks within a memory system. In conventional wear leveling techniques, memory systems may attempt to maintain a P/E count of each memory block near an overall average P/E count of the memory blocks at the memory system. This effort to maintain the P/E count of each memory block near the overall average P/E count of the memory system may lead to unnecessary write operations that result in unnecessarily copying of data from one memory block to another.
Improved wear leveling techniques are desirable that reduce a number of write/copy operations within a non-volatile memory system.